A cutting-edge semiconductor company in Toronto is seeking a Software Engineering Manager to lead a team in automation, regression systems, and DevOps infrastructure. The ideal candidate should have over 8 years of software development experience with strong skills in automation frameworks and continuous integration. This full-time position offers a comprehensive health plan and a flexible work environment. #J-18808-Ljbffr
Join to apply for the Staff / Sr Staff RTL Design Engineer role at Alphawave SemiThe OpportunityWe're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles.Alphawave Semi is expanding its team in connectivity networking products engineering Team. We are looking for experienced SoC RTL design engineers to contribute to our next generation connectivity networking products. This is an incredible opportunity to be part of the AI revolution and contribute to the complete semiconductor development cycle, from concept to product.The ideal candidate will have a strong and extensive background in RTL design across multiple projects. As an experienced RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code & functional coverage. You will work with Physical design team to meet area, power and performance goals.Why Join Us?Work on cutting-edge SoC designs in advanced process nodes.Products purpose-built for AI datacenter scale out and scale up connectivityWork in a high-impact, fast-paced environment.Competitive compensation and career growth opportunities.Work alongside some of the best minds in the semiconductor industry.What You'll DoMicro architect and RTL Design of SoC SubSystem/IP blocksWill develop UPF and run CLP checksWill be responsible for RTL quality checks - Lint/CDC/LECCreate appropriate documentation for hardware blocksResponsible for analyse / debug / fixing issues reported by verification teamWill develop the synthesis constraints for the blocks / subsystemWork with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementationWhat You'll NeedStrong background with multi-year and multi-project experience in RTL SoC Design (Verilog/VHDL), and ASIC/FPGA debug methodologiesExperience in SerDes PHY, DSP, and Analog mixed signal is desirableKnowledge in Ethernet and PCIe standards is desirableTest Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics.Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC.Timing Closure: Comprehensive understanding of timing closure.Post-Silicon Debug: Experience in post-silicon bring-up and debugging.Communication & Leadership: Team player with strong communication skills to ensure effective program execution.It Would Be Amazing If You HadArchitecture: Ability to develop architecture and micro-architecture based on specifications.Bus Protocols & Peripherals: Knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc.Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage.Chip IO Design: Knowledge of chip IO design and packaging is beneficial.Salary And BenefitsYour contribution will be recognized with a base salary influenced by your qualifications, experience, location, and the internal equity of our team to ensure fairness and consistency across roles. In addition to our comprehensive benefits package, employees are also eligible for additional compensation opportunities.Health & Wellness programs that emphasize knowledge and prevention, helping you stay proactive and prepared to manage your health at every stage.Comprehensive health plansWellness Spending Account (WSA)Employee Assistance Program (EAP)Time OffPaid VacationPaid HolidaysParental LeaveEqual Employment Opportunity StatementAlphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. #J-18808-Ljbffr
OverviewSoftware Engineering Manager – Silicon Tools, Infrastructure, Automation & DevOps. Alphawave Semi enables tomorrow’s future by accelerating data communication across data centers, networking, storage, AI, 5G, and autonomous vehicles. We are seeking an experienced Software Engineering Manager to lead a cross-functional team supporting silicon design, verification, and validation workflows, focusing on automation, regression systems, test frameworks, and DevOps infrastructure.What you’ll doLead and mentor a team of software engineers, firmware engineers, and DevOps engineers.Define roadmaps and priorities for SDKs, regression systems, and test framework development.Partner with silicon design, verification, post-silicon, and validation teams to identify automation opportunities.Architect, develop, and maintain regression and continuous integration frameworks for silicon simulation and post-silicon validation.Oversee build systems, test harnesses, and performance dashboards to improve engineering efficiency.Establish robust CI/CD pipelines tailored for hardware-in-the-loop regression, EDA, verification, and firmware/software co-design environments.Manage on-premise and cloud-based compute clusters for large-scale regression workloads.Develop internal tools and GUIs to simplify engineers’ workflows.Ensure scalability, maintainability, and observability of all systems.Define engineering best practices, coding standards, and documentation requirements.Implement metrics-driven decision making for test coverage, performance, and resource utilization.What you’ll needBachelor’s or Master’s degree in Computer Science, Electrical Engineering, or related field.8+ years of software development experience, with at least 3 years in a leadership/management role.Proven track record in automation frameworks, continuous integration, and large-scale regression systems for silicon or hardware development.Strong programming skills in Python, C++, C, or similar languages.Experience with DevOps tools (e.g., Jenkins, GitLab CI, Docker) and EDA flows (simulation, synthesis, verification).Familiarity with distributed computing and workload schedulers (e.g., LSF, Slurm).Preferred SkillsBackground in ASIC/FPGA verification environments or firmware/hardware co-design.Knowledge of silicon bring-up, post-silicon validation, or lab automation.Experience with metrics/telemetry systems (e.g., Prometheus, Grafana, ElasticSearch).Comfortable operating in a hybrid on-premise + cloud compute environment.Benefits and Work EnvironmentWe have a flexible work environment to support and help employees thrive in personal and professional capacities.Health & WellnessComprehensive health planHealth Spending Account (HSA)Wellness Spending Account (WSA)Employee Assistance Program (EAP)Time OffPaid VacationPaid HolidaysParental Leave Top-Up ProgramEqual Employment OpportunityAlphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.Seniority levelMid-Senior levelEmployment typeFull-timeJob functionEngineering and Information TechnologyIndustries: Semiconductor ManufacturingReferrals increase your chances of interviewing at Alphawave Semi by 2xRichmond Hill, Ontario, Canada #J-18808-Ljbffr
The OpportunityWe’re looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Our team develops industry‑leading high‑speed interconnect IP for high‑performance computing and artificial intelligence. We are looking for an RTL engineer who loves thinking beyond the block—owning designs from RTL through synthesis, CTS, and final place & route. You will bring a strong RTL mindset to classic back‑end challenges, drive power/timing quality, and help develop AI/agent tooling for automation and quality tracking. What you will do Own front‑to‑back implementation of complex IP: from micro‑architecture & RTL in SystemVerilog to clean handoff for synthesis, CTS, and P&R. Synthesis & QoR: run and interpret DC/Fusion reports; guide retiming, pipeline/boundary placement, logic restructuring, constraint cleanup, and RTL optimizations for PPA. Timing constraints & reviews: author/maintain SDC (clocks, generated clocks, groups, false/multicycle/min/max paths); perform timing reviews, triage violations, and partner with STA/PD to close MCMM corners. Clocking & CTS inputs: help define clock architecture, CTS targets (latency/skew/jitter), exceptions, and boundary timing to achieve robust closure. Power analysis & optimization: set up stimulus, generate SAIF/VCD, correlate vector-based power (PTPX), drive clock/power-gating and micro‑architectural improvements. AI/Agents in the flow: integrate LLM/agents to auto‑triage logs & violations, lint constraints, detect regressions, surface QoR deltas, and recommend fixes/ECO candidates; build dashboards for quality tracking. Design quality & sign‑off hygiene: collaborate on lint/CDC/RDC, FM/LEC; support DFT/test‑mode constraints; contribute to UPF/low‑power timing considerations. Collaboration & mentorship: work tightly with RTL, PD, STA, DV, and DFT; clear documentation including best practices, and mentor peers on front‑to‑back thinking; strong cross‑functional collaboration. What you’ll need Bachelor/Master in Computer/Electrical Engineering (or equivalent) and substantial experience delivering silicon from RTL through PnR. SystemVerilog RTL expertise: clean, synthesizable code; strong micro‑architecture instincts for PPA; simulation debug; signoff with Formal/LEC (Formality/Conformal), lint/CDC/RDC (SpyGlass). Synthesis & STA proficiency: hands‑on with Design Compiler / Fusion / PrimeTime; comfortable reading/analyzing QoR and timing reports. SDC mastery: clocks, generated clocks, clock groups, exceptions; hierarchical constraints for MCMM sign‑off. CTS/P&R awareness: practical understanding of ICC2 flows, useful skew, buffering/sizing, and boundary timing effects. Power skills: SAIF/VCD workflows, PrimeTime PX, vector‑vs‑vectorless-based power, and power‑driven RTL/synthesis techniques. Automation mindset: strong Tcl & Python for constraint generation/validation, report mining, dashboards, and CI. AI curiosity & delivery: experience or clear enthusiasm for applying LLMs/agents (e.g., log intelligence, constraint linting, violation clustering, ECO suggestions, regression health checks). Nice to have Familiarity with UPF/low‑power implementation; IR/EM‑aware considerations; LVF/variation. High‑speed/mixed‑signal interfaces (DDR, PCIe, SerDes) and digital/analog boundary timing. Salary and Benefits Your contribution will be recognized with a base salary influenced by your qualifications, experience, location, and the internal equity of our team to ensure fairness and consistency across roles. In addition to our comprehensive benefits package, employees are also eligible for additional compensation opportunities, including Restricted Stock Units (RSUs), short‑term incentive program, Retirement & Saving Programs and participation in the Employee Stock Purchase Plan (ESPP). Health & Wellness programs that emphasize knowledge and prevention, helping you stay proactive and prepared to manage your health at every stage. Comprehensive health plans. Wellness Spending Account (WSA). Employee Assistance Program (EAP). Time Off Paid Vacation. Paid Holidays. Parental Leave. Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. #J-18808-Ljbffr
A semiconductor company in Toronto seeks a Staff / Sr Staff RTL Design Engineer to develop SoC designs and contribute to cutting-edge technologies in AI and networking. The ideal candidate will have experience in RTL design across multiple projects, strong communication skills, and expertise in design synthesis and verification. The role offers competitive compensation and opportunities for career growth. #J-18808-Ljbffr
Senior Physical Design Engineer Alphawave Semi The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. What You’ll Do Drive the backend process through the entire implementation flow Floor-planning/Block Partitioning/Power Planning Support Front-End team in performing PPA optimization trials Leverage LLM and EDA tools to drive PPA optimization Place & Route with special focus on power and area optimization Clock Tree Synthesis/Inspection/Optimization Static timing verification and timing closure experience Perform physical verification and fixing (DRC, ANT, DFM, LVS, ERC…) Perform EM/IR signoff and address power integrity issues. What You’ll Need 7+ years of Physical Design experience Bachelor’s degree in Electrical or Computer Engineering or equivalent Low-Power Designs experience desired SOC design experience is desired Advanced technology node experience desired About You Extremely detail oriented Great collaboration and communication skills Superb analytical and problem-solving skills Good scripting skills Drives for consistency Takes personal pride in high standard of outputs Self-motivated and self-managing Benefits Health & Wellness Comprehensive health plan Health Spending Account (HSA) Wellness Spending Account (WSA) Employee Assistance Program (EAP) Time Off Paid Vacation Paid Holidays Parental Leave Top-Up Program Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. #J-18808-Ljbffr
A semiconductor technology company in Toronto seeks experienced SoC design verification engineers to support next-generation connectivity networking products. You will drive pre-silicon verification, collaborate on high-performance SoCs, and enhance verification methodologies. Ideal candidates have multi-year verification experience, a strong understanding of UVM and System Verilog, and are proficient in communication within cross-functional teams. This role offers competitive compensation and robust benefits, including health and wellness programs. #J-18808-Ljbffr
OverviewSerDes PHY FW/SW Engineer - Staff/Senior Staff/Principal Levels at Alphawave Semi. The Embedded Software / Firmware Team develops critical embedded software powering high-performance multi-standard SerDes PHY IP used in data center, AI/ML, automotive, and compute applications. Our SerDes IPs support PCIe, Ethernet, CXL and are integrated into SoCs/ASICs for leading semiconductor companies.What You'll DoTechnical lead for SerDes firmware on a major IP program, guiding a team (2–8 engineers) through planning, development, validation, and customer deliveryArchitecting and implementing embedded C/C++ firmware for hardware calibration, training algorithms, DSP adaptations, and link state managementDebugging complex lab and field issues with hardware, applications, and validation teamsCollaborating across functions to define FW milestones, plan sprints, close tickets, and deliver reliable, high-quality featuresTranslating protocol specifications (e.g. PCIe, Ethernet, CXL) into internal firmware architecture and documentationSupporting development and silicon bring-up across Alphawave Semi teams and other sitesResponsibilitiesEmbedded firmware running on RISC-V-based controllers that manage Alphawave’s advanced SerDes datapathsC SDKs provided to customers for SerDes bring-up, calibration, tuning, and diagnosticsPython-based lab tools and GUIs for interactive debug, register access, and validationBuild, regression, and CI infrastructure to ensure code quality and full coverageExample Problems You’ll SolveMentoring a junior engineer through hard-to-reproduce PHY calibration bugs seen in customer siliconDeveloping architecture and state machines for multi-lane synchronization or adaptive equalizationPorting MATLAB or Python SerDes calibration algorithms to optimized fixed-point firmwareCreating a SerDes diagnostics framework accessible via SDK and GUIUsing simulation environments and FPGA emulation to validate FW behavior before tapeoutWhat You'll NeedBS/MS in Electrical Engineering, Computer Engineering, or related field7+ years of embedded C/C++ firmware development for hardware IP or SoCsTechnical or team leadership experience in embedded software projects from spec to productionDeep understanding of microcontroller architecture (RISC-V a plus), memory-mapped registers, ISRs, and boot flowsStrong lab debug skills with scopes, analyzers, and custom toolsFamiliarity with git and modern software development methodologiesExcellent communication skills and ability to collaborate across functions and geographiesPreferred ExperienceKnowledge of SerDes, high-speed IO standards (PCIe, Ethernet, UCIe, CXL, etc)Calibration algorithms, signal conditioning, and adaptive feedback control in hardwareSilicon bring-up and post-silicon debugPre-silicon firmware development (DV, emulation, etc)RTOS or bare-metal FW architecturesScripting in Python, Bash, etc. for lab automation and testingDigital design concepts (Verilog/SystemVerilog), simulation, and DV flowsOSi model exposure, especially physical and data link layersUnderstanding of signal processing concepts (eye diagrams, jitter, BER, SNR, CTLE/DFE/FFE)Benefits & Work EnvironmentFlexible work environment to support personal and professional growthComprehensive health plan, Health Spending Account (HSA), Wellness Spending Account (WSA), Employee Assistance Program (EAP)Paid vacation, paid holidays, parental leave top-upEqual Employment OpportunityAlphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. #J-18808-Ljbffr
Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data‑demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission‑critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in connectivity networking products engineering. We are looking for experienced SoC design verification engineers to contribute to our next generation connectivity networking products. This is an incredible opportunity to be part of the AI revolution and contribute to the complete semiconductor development cycle, from concept to product. The ideal candidate will have a strong and extensive background in RTL verification methodologies, UVM, C, and SystemVerilog. You will be responsible for driving pre‑silicon verification, collaborating with cross‑functional teams, and ensuring the successful validation of high‑performance SoCs. Why Join Us Work on cutting‑edge SoC designs in advanced process nodes. Products purpose‑built for AI datacenter scale out and scale up connectivity. Work in a high‑impact, fast‑paced environment. Competitive compensation and career growth opportunities. Work alongside some of the best minds in the semiconductor industry. What You'll Do Build testbenches and analyze test failures to uncover bugs in IP. Integrate 3rd party VIPs for compliance testing of standard protocols. Build releases of our design into SoC design integration team. Take on opportunities to lead, plan, and coordinate tasks with team members. Collaborate closely with IP design, FE design, PD, PV, EM/IR and post‑SI teams. Contribute towards the continuous improvement of IP verification methodologies and processes. What You'll Need Multi‑year experience in Design SoC Verification. Experience in SerDes PHY, DSP, and Analog mixed signal is desirable. Knowledge in Ethernet and PCIe standards is desirable. An applied understanding of UVM and verification techniques. Experience with constrained‑random verification in System Verilog and UVM. Formal Verification, and Power‑aware UPF verification techniques. Tools/Languages - System Verilog, UVM, Python, Perl, C/C++. Post‑Silicon Debug: Experience in post‑silicon bring‑up and debugging. Communication & Leadership: Team player with strong communication skills to ensure effective program execution. Salary And Benefits Your contribution will be recognized with a base salary influenced by your qualifications, experience, location, and the internal equity of our team to ensure fairness and consistency across roles. In addition to our comprehensive benefits package, employees are also eligible for additional compensation opportunities, including Restricted Stock Units (RSUs), short‑term incentive program, Retirement & Saving Programs and participation in the Employee Stock Purchase Plan (ESPP). You'll also be eligible for benefits described as per below: Health & Wellness programs that emphasize knowledge and prevention, helping you stay proactive and prepared to manage your health at every stage. Comprehensive health plans. Wellness Spending Account (WSA). Employee Assistance Program (EAP). Time Off Paid Vacation. Paid Holidays. Parental Leave. Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. #J-18808-Ljbffr
A leading technology firm in Toronto is seeking a Senior Physical Design Engineer to drive critical data communication solutions. The role involves backend process implementation, physical verification, and collaboration with Front-End teams on PPA optimization. The ideal candidate will have over 7 years of Physical Design experience and a Bachelor’s degree in Electrical or Computer Engineering. This position offers a comprehensive health plan, paid vacation, and a strong focus on employee wellness. #J-18808-Ljbffr
